ENGINEERING TECHNOLOGY -- INTEGRATED CIRCUIT LAYOUT
Eastfield and Richland only
(Certificate)
(Students pursuing this certificate program are required to meet all TASP requirements.)
Degree Plan Code: C2.ENGR.INTR.CT.LAY
This certificate program provides courses work to assist the student to prepare for entry-level positions in Integrated Circuit Layout. Emphasis is placed on working closely with all members of the semiconductor design team.
SEMESTER I
SEMESTER II
SEMESTER III
Minimum Hours Required |
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43 |