ENGINEERING TECHNOLOGY -- INTEGRATED CIRCUIT LAYOUT
Eastfield and Richland only
(Associate in Applied Sciences Degree)
(Students pursuing this AAS program are required to meet all TASP requirements.)
Degree Plan Code: AAS.ENGR.INTR.CT.LAY
The Integrated Circuit Layout program trains the student to prepare layout drawings and designs of integrated circuits from schematics using computer-aided design equipment. The program aids the student in developing the skills necessary to convert logic diagrams to cell drawings in accordance with design rules. Students will perform design rule checks and prepare databases for pattern generation. Emphasis is
placed on working closely with all members of the semiconductor manufacturing design team.
SEMESTER I
SEMESTER II
SEMESTER III
SEMESTER IV
+Elective |
Humanities/Fine Arts |
3 |
++Elective |
Social/Behavioral Science |
3 |
DFTG 1394 |
Special Topics in Electrical / Electronics Drafting |
3 |
ITSE 1407 |
Introduction to C++ Programming OR |
4 |
ITSE 1402 |
Introduction to Computer Programming OR |
(4) |
COSC 1315 |
Computer Science I |
(3) |
EECT 2380 |
Cooperative Education - Electrical, Electronic, and Communications Engineering Technology/Technician OR |
3 |
ENTC 2380 |
Cooperative Education - Engineering, Technology/Technician, General OR |
(3) |
DFTG 2380 |
Cooperative Education-Drafting OR |
(3) |
+++Elective |
Technical |
(3-4) |
|
|
15-17 |
Minimum Hours Required |
|
62-64 |
+Humanities/Fine Arts elective must be selected from the DCCCD approved list.
++Social/Behavioral Science elective must be selected from the DCCCD approved list.
+++Technical elective must be selected from the following:
NOTE: Students enrolling in this program who plan to transfer to a four-year institution should consult an engineering technology faculty member regarding transfer requirements and the transferability of these course to the four-year institution.